Call for Papers ( download )
DFT is an annual
Symposium providing an open forum for presentations in the field of
defect and fault tolerance in VLSI systems inclusive of emerging
technologies. One of the unique features of this symposium is to
combine new academic research with state-of-the-art industrial data,
necessary ingredients for significant advances in this field. All
aspects of design, manufacturing, test, reliability, and availability
that are affected by defects during manufacturing and by faults during
system operation are of interest.
This year the Symposium will be held in Cambridge (MA) USA in an area with one of the highest concentrations of research and academic insitutions in the world.
. The topics include (but are not limited to)
the following ones:
- Yield
Analysis and Modeling
Defect/Fault analysis and models; statistical yield modeling; critical area and other metrics. - Repair,
Restructuring and Reconfiguration
Repairable logic, reconfiguration, repair; reconfigurable circuit design; DFT for on-line operation. - Testing
Techniques
Built-in self-test; delay fault modeling and diagnosis; testing for analog and mixed circuits; signal and clock integrity. - Error
Detection, Correction, and Recovery
Self-testing and self-checking design; error-control coding; fault masking and avoidance; recovery schemes, space/time redundancy. - Defect and
Fault Tolerance
Reliable circuit synthesis; radiation hardened/tolerant processes and design; transient/soft faults and errors. - Dependability
Analysis and Validation
Fault injection techniques and environments; dependability characterization of IC and systems. - Emerging
Technologies
DFT techniques for CNTs, QCA, DNA, RTDs, SETs, molecular devices and self-assembly. - Design For
Testability in IC Design
FPGA, SoC, NoC, ASIC, microprocessors. - Totally
Fail-Safe Design for Critical Applications
Methodologies and case study applications to automotive, railway, avionics, industrial control, biomedicine and space.
Paper Submission:
Prospective authors should
prepare an extended summary or the full paper (up to 9 pages in the
IEEE 6X9 format), to be submitted as PDF file. Uncompressed
unencapsulated postscript may also be used when necessary. Submission
should be done electronically. Detailed information about the
submission process can be found here
We are also interested in panel sessions that involve industrial
experiences: please send an email to the Program Chairs with a brief
description (1 page maximum) of the panel discussion you would like to
propose.
Paper Publication and Presenter Registration:
Papers will be accepted for regular or poster presentation at the symposium. Proceedings will be published by the IEEE Computer Society. Each accepted paper MUST have at least an author with a paid full registration for the manuscript to be included and published in the proceedings; an author is also expected to attend and present the paper at the Symposium.
Journal Special Issue:
Authors will have the opportunity to submit an extended version of their paper presented at the symposium in a special issue of an archival journal.
Best Paper Award:
A “Best Paper Award” will be awarded by the technical program committee.
Deadlines:
Prospective authors should adhere to the following deadlines:
Submission
deadline: May
7, 2008
Notification of
acceptance:
June 20, 2008
Camera ready full
papers:
July 14, 2008
The proceedings will be published by the IEEE Computer Society.
