IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems

Overview of the conference

DFTS is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies, RISC-V architectures and AI-based solutions. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, availability, and security that are affected by defects during manufacturing and by faults during system operation are of interest.

Organizing Committee

General Co-Chairs	Marco Ottavi	University of Rome Tor Vergata, Italy and University of Twente, The Netherlands	m.ottavi@utwente.nl
General Co-Chairs	Silvia Moranti	European Space Agency ESTEC, The Netherlands	silvia.moranti@esa.int
Program Co-Chairs	Shanshan Liu	University of Electronic Science and Technology of China, China	ssliu@uestc.edu.cn
Program Co-Chairs	Petr Fišer	Czech Technical University in Prague, Czech Republic	petr.fiser@fit.cvut.cz
Finance Chair	Gianluca Furano	European Space Agency ESTEC, The Netherlands	gianluca.furano@esa.int
Special Session Co-Chairs	Bruno Forlin	University of Twente, The Netherlands	b.endresforlin@utwente.nl
Special Session Co-Chairs	Livia Manovi	European Space Agency ESTEC, The Netherlands	livia.manovi@esa.int
Publication Chair	Marcello Traiola	UINRIA, France	marcello.traiola@inria.fr
Local Arrangement Chair	Giuseppe Scotti	University of Rome La Sapienza, Italy	giuseppe.scotti@uniroma1.it
Publicity and Web Chair	Tijmen Smit	University of Twente, The Netherlands	t.t.smit@utwente.nl

DFTS