DFT (International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems) is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field.
Information on how to get to the conference hotel is available at the link: http://www.moevenpick-hotels.com/en/europe/netherlands/amsterdam/hotel-amsterdam/location/
Special Sections on Trans. on Computers and Trans. on Nanotechnology ***
Authors of the papers presented at DFT are welcome to submit an extended version (at least 30% of new content and complete paper re-writing) of their work to a Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems that will appear on the IEEE Trans. on Computers and on the IEEE Trans. on Nanotechnology. More details here.
DFT Symposium is sponsored by:
- the IEEE Computer Society
- the IEEE Fault-Tolerant Computing Technical Committee
- the IEEE Test Technology Technical Council