Latest Update

• Tentative program available here
• Camera-ready submission postponed: August 20
• Paper notification postponed: July 19
• Deadline extension: full paper submission on May 24
• Deadline extension: abstract submission on May 10
• Call for papers special sessions available pdf
• Call for papers available pdf
• The new site is up

Call for papers

PDF Version

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation ar e of interest. Topics include (but are not limited to) the following:

• • • Yield Analysis and Modeling
      Defect/fault analysis and models; statistical yield modeling; diagnosis; critical area and other metrics.
    • Testing Techniques
      Built-in self-test; delay fault modeling and diagnosis; testing for analog and mixed circuits; online testing; signal and clock integrity.
    • Design For Testability in IC Design
      FPGA, SoC, NoC, ASIC, low power design and microprocessors.
    • Error Detection, Correction, and Recovery
      Self-testing and self-checking solutions; error-control coding; fault masking and avoidance; recovery schemes, space/time redundancy; hw/sw techniques; architectural and system-level techniques.
    • Dependability Analysis and Validation
      Fault injection techniques and frameworks; dependability and characterization.
    • Repair, Restructuring and Reconfiguration
      Repairable logic; reconfigurable circuit design; DFT for on-line operation; self-healing; reliable FPGA-based systems.
    • Defect and Fault Tolerance
      Reliable circuit/system synthesis; fault tolerant processes and design; design space exploration for dependable systems, transient/soft faults.
    • Radiation effects
      SEEs on nanotechnologies; modeling of radiation environments; radiation experiments; radiation hardening techniques.
    • Aging and Lifetime Reliability
      Aging characterization and modeling; design and run-time reliability, thermal, and variability management and recovery.
    • Dependable Applications and Case Studies
      Methodologies and case studies for IoTs, automotive, railway, avionics and space, autonomous systems, industrial control, etc.
    • Emerging Technologies
      Techniques for 2.5D/3D ICs, quantum computing architecttures, memristors, spintronics, microfluidics, etc.
    • Design for Security
      Fault attacks, fault tolerance-based countermeasures, scan-based attacks and countermeasures, hardware trojans, security vs. reliability trade-offs, interaction between VLSI test, trust, and reliability.

Call for Special Sessions

PDF Version

DFT’19 seeks proposals for Special Sessions. The special sessions should aim at providing a complementary experience with respect to the regular sessions by focusing on hot and emerging topics of interest to the DFT community, as well as on multi-disciplinary topics, that are expected to have a significant impact on DFT activities in the future (e.g. reliability aspects in Approximate Computing, Quantum Computing, use of COTS Electronics for Space applications). A special session could consist of a set of individual presentations or a panel, possibly with experts from the industry.

Upon acceptance, special session presenters can prepare either a single paper for the entire session or one paper per presenter to be included in the formal proceedings. For this reason, papers (presenting original and unpublished contributions and that may be 4 pages or 6 pages long) for special session will go through review process. For the single-session papers, it will be possible to purchase 2 extra pages at an additional cost. Accepted papers will appear in the formal proceedings of DFT 2019 symposium. Proceedings will be published by the IEEE Computer Society and will appear in the Digital Library

Submission Process: Submitted proposals should include:

• • • a title of the special session
    • a maximum 250-word abstract outlining the session's scope, topics and relevance for DFT symposium
    • name, contact information and short biography of the organizer(s)
    • format of the session: (1) panel or set of individual presentations, and (2) single paper per session or one paper per presenter
    • list of three/four contributed presentations (including titles, presenter names, contact information of the corresponding presenter, and an abstract of each contribution). For panel proposals, list three to five panelists and their area of expertise.

Proposal submissions should be presented in a single PDF to be sent via e-mail to the Special Session Chair:

• • • Luigi Dilillo - dilillo at lirmm dot fr

By means of their submission, all presenters agree to register for and participate to DFT’19, in case their special session proposal is accepted.

Important Dates

DFT 2019

32nd IEEE Int. Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
October 2 – October 4, 2019, ESA-ESTEC & TU Delft, Netherlands

This document provides instructions for submitting papers to the 32nd edition of the IEEE Int. Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2019. In an effort to respect the efforts of reviewers and in the interest of fairness to all prospective authors, we request that all submissions to DFT’19 follow the formatting and submission rules detailed below. Submissions that violate these instructions may not be reviewed, at the discretion of the program chair, in order to maintain a review process that is fair to all potential authors. An example submission (formatted using the DFT’19 submission format) that contains the submission and formatting guidelines can be downloaded from here: Sample PDF. The content of the document mirrors the submission instructions on this page.

Submission Site:

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