IEEE Defect and Fault Tolerance
in VLSI and Nanotechnology Systems Symposium
  
IEEE Defect and Fault Tolerance
in VLSI and Nanotechnology Systems Symposium
  

Welcome to DFT 2017 in Cambridge, UK

 

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field.

For its 30th edition DFT is coming to Europe and to Cambridge, UK.

Follow us on @DFTSymposium.

Special issue for DFT 2016 on IEEE Trans. on Emerging Topics in Computing

The Call for Papers for the Special Issue for DFT 2016 is out ... Deadline for paper submission is March 1, 2017!

Looking forward to seeing you in Cambridge


credits: Tawfique Hasan (Cambridge)


credits: Tawfique Hasan (Cambridge)

Latest news

JAN
18
2017
Updated webite
Call for papers now available