D F T 2 0 1 5

October 12-14, 2015
Welcome to the 28th edition of the Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium

The symposium

DFT (International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems) is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field.

Where

In 2015 DFT will be hosted at the University of Massachusetts Amherst.

When

October 12-14, 2015.

Call for papers

The up-to-date call for paper is available here.

Special Session

Authors will have the opportunity to submit an extended version of their paper presented at the symposium for a Issue/Special Section scheduled to appear in the last issue of 2016 in IEEE Transaction on Emerging Topics in Computing. More details here.