Welcome to the website of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, DFT 2012, the 25th edition of a successful series.

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field.
All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest.
The symposium is held yearly, around the world, and this year will be located in Austin, Texas, U.S.A.

• cSubmission deadline EXTENDED: May 6, 2012 May 13, 2012
  Paper registration still due on May 6.
• cAcceptance notification: July 1, 2012
• cCamera ready and Author registration deadline: August 3, 2012

• Submission web site open link
• Call for Paper pdf
• Call for paper for a Special Section in the IEEE Trans. on Nanotechnology in relation to the DFT 2011 and upcoming DFT 2012 events pdf
• Deadline extension for the Special Issue on "Journal of Electronic Testing: Theory and Applications": new deadline March 9, 2012 (pdf)
• Call for paper for a Special Issue on "Journal of Electronic Testing: Theory and Applications" (JETTA), published by Springer, in relation to the DFT 2011 event: pdf