IEEE International Symposium on Defect and Fault Tolerance
in VLSI and Nanotechnology Systems

IEEE Int. Symp. Defect and Fault Tolerance in VLSI & Nanotechnology Systems

Austin, Texas, U.S.A.

Oct. 3-5, 2012

Committees

General co-chairs

  • Prashant D. Joshi (Intel,USA)
  • Massimo Violante (Politecnico di Torino, Italy)

Program co-chairs

  • Jie Han (University of Alberta, Canada)
  • Ramesh Karri (Polytechnic Institute of NYU, U.S.A)

Technical Program Committee

The list of members is being updated and will soon be available.